This logic gate simulation is more complex than the last one. There are still only two switches but there are now two outputs, two NOT gates, a NAND, and there is an or. this simulation is used to prove DeMorgan's law.
| A | B | NAND | Output 1 | NOT A | NOT B | OR | Output 2 |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 |
| 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 |
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